Project Background

The group at Columbia pioneered the construction of highly parallel machines dedicated to QCD calculations in 1982, and produced a series of three successful machines between 1985 and 1989 which were used to obtain a variety of new results in QCD. During this period there were also a number of other dedicated computer projects with similar goals carried out in Italy (the APE Project), Japan (QCD-PAX), and Fermilab (ACP-MAPS) and IBM (GF11) in the U. S.  The QCDSP project was begun at Columbia in 1993, the first working hardware was available in August 1995, and a working 6Glfops machine in July 1996.   Four hundred Gflops and 600 Gflops machines are scheduled for completion in January and February, 1998, respectively.   At present there are two other major projects with similar objectives: the CP-PACS project in Tsukuba and the APE-MILLE project in Rome.  The theoretical work of the group at Columbia as well as the design and construction of the machines at Columbia is supported in part by the U.S. Department of Energy.

The 50 Gflops, 1024-node QCDSP machine before its installation at SCRI.

In addition to the 400 Gflops machine installed at Columbia and the 600 Gflops machine at the RIKEN/Brookhaven Research Center, a number of smaller versions have been supplied to collaborating institutions. A 64-processor, 3 Gflops machine has been installed at the University of Wuppertal in Germany, a 128-processor, 6 Gflops machine at Ohio State University and a 1024-processor, 50 Gflops machine in SCRI at Florida State University  which has now been moved to the Jefferson Lab. While all these computers have been constructed to support research in particle physics, the architecture is appropriate for a variety of problems. 

The next, QCDOC project was begun in December 1999 with the goals of providing multiteraflops computing resources to the research group at Columbia, the RIKEN BNL Research Center, the University of Edinburgh and the U.S. lattice QCD community.   The figure below shows the first QCDOC hardware, an JTAG/Ethernet interface, created by P. Hochshild and Rich Swetz at the T.J. Watson Research Center of IBM, which currently under test at Columbia.  This permits Ethernet booting of the individual nodes in the QCDOC machine.

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